A. OR operation
B. AND operation
C. NOT operation
D. None of the above
Related Mcqs:
- The number of Boolean functions that can be generated by n variables is equal to_________________?
A. 2n
B. 22 n
C. 2n-1
D. — 2n - Consider the representation of six-bit numbers by two’s complement, one’s complement, or by sign and magnitude: In which representation is there overflow from the addition of the integers 011000 and 011000 ?
A. Two’s complement only
B. Sign and magnitude and one’s complement only
C. Two’s complement and one’s complement only
D. All three representations - A debouncing circuit is________________?
A. an astable MV
B. a bistable MV
C. a latch
D. a monostable MV - Digital computers are more widely used as compared to analog computers, because they are______________?
A. less expensive
B. always more accurate and faster
C. useful over wider ranges of problem types
D. easier to maintain - Positive logic in a logic circuit is one in which______________?
A. logic 0 and 1 are represented by 0 and positive voltage respectively
B. logic 0 and, -1 are represented by negative and positive voltages respectively
C. logic 0 voltage level is higher than logic 1 voltage level
D. logic 0 voltage level is lower than logic 1 voltage level - Indicate which of the following three binary additions are correct? 1.1011 + 1010 = 10101 II. 1010 + 1101 = 10111 ?
III. 1010 + 1101 = 11111
A. I and II
B. II and III
C. III only
D. II and III - Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is__________________?
A. 10 CPS
B. 120 CPS
C. 12CPS
D. None of the above - The only function of NOT gate is to__________________?
A. Stop signal
B. Invert input signal
C. Act as a universal gate
D. None of the above - Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins ?
A. PLCC
B. QFP
C. PGA
D. BGA - What would happen, if smaller logic modules are utilized for performing logical functions associated with FPGA? A. Propagation delay will increase B. FPGA area will increase C. Wastage of logic modules will not be prevented D. Number of interconnected paths in device will decrease ?
A. A & B
B. C & D
C. A & D
D. B & C