A. logic 0 and 1 are represented by 0 and positive voltage respectively
B. logic 0 and, -1 are represented by negative and positive voltages respectively
C. logic 0 voltage level is higher than logic 1 voltage level
D. logic 0 voltage level is lower than logic 1 voltage level
A. TTLAS
B. CMOS
C. ECL
D. TTLLS
A. 6
B. 32
C. 64
D. 128
A. have lower fabrication area
B. can be used to make any gate
C. consume least electronic power
D. provide maximum density in a chip
A. all the inputs to the gates are “1”
B. all the inputs are ‘0’
C. either of the inputs is “1”
D. all the inputs and outputs are complemented
A. an astable MV
B. a bistable MV
C. a latch
D. a monostable MV
A. 1 at any input causes the output to be at logic 1
B. 1 at any input causes the output to be at logic 0
C. 0 any input causes the output to be at logic 0
D. 0 at any input causes the output to be at logic 1
A. Weighted code
B. Cyclic redundancy code
C. Self-complementing code
D. Algebraic code
III. 1010 + 1101 = 11111
A. I and II
B. II and III
C. III only
D. II and III